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Precision, Very Low Noise, Low Input Bias Current, Wide Bandwidth JFET Operational Amplifiers
AD8510/AD8512/AD8513
FEATURES
Fast settling time: 500 ns to 0.1% Low offset voltage: 400 V maximum Low TCVOS: 1 V/C typical Low input bias current: 25 pA typical at VS = 15 V Dual-supply operation: 5 V to 15 V Low noise: 8 nV/Hz typical at f = 1 kHz Low distortion: 0.0005% No phase reversal Unity gain stable
NULL 1 -IN 2 +IN 3
PIN CONFIGURATIONS
8
NC V+
AD8510
NULL 1 -IN 2 +IN 3
02729-003
8
NC
7
NC = NO CONNECT
NC = NO CONNECT
Figure 1. 8-Lead MSOP (RM Suffix)
OUT A 1 -IN A 2 +IN A 3
8
Figure 2. 8-Lead SOIC_N (R Suffix)
OUT A 1 -IN A 2
8
V+ OUT B
02729-001
V+ OUT B
02729-002
02729-006
AD8512
7
AD8512
7
APPLICATIONS
Instrumentation Multipole filters Precision current measurement Photodiode amplifiers Sensors Audio
TOP VIEW 6 -IN B (Not to Scale) V- 4 5 +IN B
+IN A 3 V- 4
TOP VIEW 6 -IN B (Not to Scale) 5 +IN B
Figure 3. 8-Lead MSOP (RM Suffix)
OUT A 1 -IN A 2 +IN A 3 V+ 4
14 13
Figure 4. 8-Lead SOIC_N (R Suffix)
OUT A 1 -IN A 2 +IN A 3 V+ 4
14 13
OUT D -IN D +IN D
OUT D -IN D +IN D
11 V- TOP VIEW +IN B 5 (Not to Scale) 10 +IN C
02729-005
AD8513
12
11 V- TOP VIEW +IN B 5 (Not to Scale) 10 +IN C
AD8513
12
-IN B 6 OUT B 7
9 8
-IN C OUT C
-IN B 6 OUT B 7
9 8
-IN C OUT C
Figure 5. 14-Lead SOIC_N (R Suffix)
Figure 6. 14-Lead TSSOP (RU Suffix)
GENERAL DESCRIPTION
The AD8510/AD8512/AD8513 are single-, dual-, and quadprecision JFET amplifiers that feature low offset voltage, input bias current, input voltage noise, and input current noise. The combination of low offsets, low noise, and very low input bias currents makes these amplifiers especially suitable for high impedance sensor amplification and precise current measurements using shunts. The combination of dc precision, low noise, and fast settling time results in superior accuracy in medical instruments, electronic measurement, and automated test equipment. Unlike many competitive amplifiers, the AD8510/ AD8512/AD8513 maintain their fast settling performance even with substantial capacitive loads. Unlike many older JFET amplifiers, the AD8510/AD8512/AD8513 do not suffer from output phase reversal when input voltages exceed the maximum common-mode voltage range. Fast slew rate and great stability with capacitive loads make the AD8510/AD8512/AD8513 a perfect fit for high performance filters. Low input bias currents, low offset, and low noise result in a wide dynamic range of photodiode amplifier circuits. Low noise and distortion, high output current, and excellent speed make the AD8510/AD8512/AD8513 great choices for audio applications. The AD8510/AD8512 are both available in 8-lead narrow SOIC_N and 8-lead MSOP packages. MSOP-packaged parts are only available in tape and reel. The AD8513 is available in 14-lead SOIC_N and TSSOP packages. The AD8510/AD8512/AD8513 are specified over the -40C to +125C extended industrial temperature range.
Rev. H
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)2002-2007 Analog Devices, Inc. All rights reserved.
02729-004
TOP VIEW 6 OUT (Not to Scale) V- 4 5 NULL
V+ TOP VIEW 6 OUT (Not to Scale) 5 NULL V- 4
7
AD8510
AD8510/AD8512/AD8513 TABLE OF CONTENTS
Features .............................................................................................. 1 Applications....................................................................................... 1 Pin Configurations ........................................................................... 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Electrical Characteristics............................................................. 4 Absolute Maximum Ratings............................................................ 6 ESD Caution.................................................................................. 6 Typical Performance Characteristics ............................................. 7 General Application Information................................................. 13 Input Overvoltage Protection ................................................... 13 Output Phase Reversal............................................................... 13 Total Harmonic Distortion (THD) + Noise .............................. 13 Total Noise Including Source Resistors ................................... 13 Settling Time............................................................................... 14 Overload Recovery Time .......................................................... 14 Capacitive Load Drive ............................................................... 14 Open-Loop Gain and Phase Response.................................... 15 Precision Rectifiers..................................................................... 16 I-V Conversion Applications.................................................... 17 Outline Dimensions ....................................................................... 19 Ordering Guide .......................................................................... 20
REVISION HISTORY
10/07--Rev. G to Rev. H Changes to Crosstalk Section........................................................ 18 Added Figure 58 ............................................................................. 18 6/07--Rev. F to Rev. G Changes to Figure 1 and Figure 2 .................................................. 1 Changes to Table 1 and Table 2...................................................... 3 Updated Outline Dimensions....................................................... 19 Changes to Ordering Guide.......................................................... 20 6/06--Rev. E to Rev. F Changes to Figure 23 ....................................................................... 9 Updated Outline Dimensions....................................................... 19 Changes to Ordering Guide .......................................................... 20 6/04--Rev. D to Rev. E Changes to Format .............................................................Universal Changes to Specifications ................................................................ 3 Updated Outline Dimensions ....................................................... 19 10/03--Rev. C to Rev. D Added AD8513 Model .......................................................Universal Changes to Specifications ................................................................ 3 Added Figure 36 through Figure 40............................................. 10 Added Figure 55 and Figure 57..................................................... 17 Changes to Ordering Guide .......................................................... 20 9/03--Rev. B to Rev. C Changes to Ordering Guide ........................................................... 4 Updated Figure 2 ............................................................................ 10 Changes to Input Overvoltage Protection Section .................... 10 Changes to Figure 10 and Figure 11............................................. 12 Changes to Photodiode Circuits Section..................................... 13 Changes to Figure 13 and Figure 14............................................. 13 Deleted Precision Current Monitoring Section.......................... 14 Updated Outline Dimensions ....................................................... 15 3/03--Rev. A to Rev. B Updated Figure 5 ............................................................................ 11 Updated Outline Dimensions....................................................... 15 8/02--Rev. 0 to Rev. A Added AD8510 Model.......................................................Universal Added Pin Configurations ...............................................................1 Changes to Specifications.................................................................2 Changes to Ordering Guide .............................................................4 Changes to TPC 2 and TPC 3 ..........................................................5 Added TPC 10 and TPC 12..............................................................6 Replaced TPC 20 ...............................................................................8 Replaced TPC 27 ...............................................................................9 Changes to General Application Information Section .............. 10 Changes to Figure 5........................................................................ 11 Changes to I-V Conversion Applications Section ..................... 13 Changes to Figure 13 and Figure 14............................................. 13 Changes to Figure 17...................................................................... 14
Rev. H | Page 2 of 20
AD8510/AD8512/AD8513 SPECIFICATIONS
@ VS = 5 V, VCM = 0 V, TA = 25C, unless otherwise noted. Table 1.
Parameter INPUT CHARACTERISTICS Offset Voltage (B Grade) 1 Offset Voltage (A Grade) Input Bias Current Symbol VOS -40C < TA < +125C VOS -40C < TA < +125C IB -40C < TA < +85C -40C < TA < +125C Input Offset Current IOS -40C < TA < +85C -40C < TA < +125C Input Capacitance Differential Common Mode Input Voltage Range Common-Mode Rejection Ratio Large-Signal Voltage Gain Offset Voltage Drift (B Grade)1 Offset Voltage Drift (A Grade) OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Output Voltage High Output Voltage Low Output Voltage High Output Voltage Low Output Current POWER SUPPLY Power Supply Rejection Ratio Supply Current/Amplifier AD8510/AD8512/AD8513 AD8510/AD8512 AD8513 DYNAMIC PERFORMANCE Slew Rate Gain Bandwidth Product Settling Time Total Harmonic Distortion (THD) + Noise Phase Margin NOISE PERFORMANCE Voltage Noise Density 12.5 11.5 CMRR AVO VOS/T VOS/T VOH VOL VOH VOL VOH VOL IOUT PSRR ISY VCM = -2.0 V to +2.5 V RL = 2 k, VO = -3 V to +3 V -2.0 86 65 +2.5 100 107 0.9 1.7 4.3 -4.9 4.2 -4.9 4.1 -4.8 54 130 2.0 2.3 2.5 2.75 5 21 0.1 Conditions Min Typ 0.08 Max 0.4 0.8 0.9 1.8 75 0.7 7.5 50 0.3 0.5 Unit mV mV mV mV pA nA nA pA nA nA pF pF V dB V/mV V/C V/C V V V V V V mA dB mA mA mA V/s MHz s % Degrees nV/Hz nV/Hz nV/Hz nV/Hz V p-p
5 12
RL = 10 k RL = 10 k, -40C < TA < +125C RL = 2 k RL = 2 k, -40C < TA < +125C RL = 600 RL = 600 , -40C < TA < +125C
4.1 3.9 3.7 40
-4.7 -4.5 -4.2
VS = 4.5 V to 18 V VO = 0 V -40C < TA < +125C -40C < TA < +125C
86
SR GBP tS THD + N M en
RL = 2 k To 0.1%, 0 V to 4 V step, G = +1 1 kHz, G = +1, RL = 2 k
20 8 0.4 0.0005 44.5 34 12 8.0 7.6 2.4
Peak-to-Peak Voltage Noise
1
en p-p
f = 10 Hz f = 100 Hz f = 1 kHz f = 10 kHz 0.1 Hz to 10 Hz bandwidth
10 5.2
AD8510/AD8512 only.
Rev. H | Page 3 of 20
AD8510/AD8512/AD8513
ELECTRICAL CHARACTERISTICS
@ VS = 15 V, VCM = 0 V, TA = 25C, unless otherwise noted. Table 2.
Parameter INPUT CHARACTERISTICS Offset Voltage (B Grade) 1 Symbol VOS -40C < TA < +125C Offset Voltage (A Grade) Input Bias Current VOS -40C < TA < +125C IB -40C < TA < +85C -40C < TA < +125C Input Offset Current IOS -40C < TA < +85C -40C < TA < +125C Input Capacitance Differential Common Mode Input Voltage Range Common-Mode Rejection Ratio Large-Signal Voltage Gain Offset Voltage Drift (B Grade)1 Offset Voltage Drift (A Grade) OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Output Voltage High Output Voltage Low Output Voltage High Output Voltage Low Output Current POWER SUPPLY Power Supply Rejection Ratio Supply Current/Amplifier AD8510/AD8512/AD8513 AD8510/AD8512 AD8513 DYNAMIC PERFORMANCE Slew Rate Gain Bandwidth Product Settling Time Total Harmonic Distortion (THD) + Noise Phase Margin 12.5 11.5 CMRR AVO VOS/T VOS/T VOH VOL VOH VOL VOH VOL IOUT PSRR ISY VS = 4.5 V to 18 V VO = 0 V -40C < TA < +125C -40C < TA < +125C SR GBP tS THD + N M RL = 2 k To 0.1%, 0 V to 10 V step, G = +1 To 0.01%, 0 V to 10 V step, G = +1 1 kHz, G = +1, RL = 2 k 86 2.2 2.5 2.6 3.0 RL = 10 k RL = 10 k, -40C < TA < +125C RL = 2 k RL = 2 k, -40C < TA < +125C RL = 600 RL = 600 , -40C < TA < +125C RL = 600 RL = 600 , -40C < TA < +125C +14.0 +13.8 +13.5 +11.4 VCM = -12.5 V to +12.5 V RL = 2 k, VCM = 0 V, VO = -13.5 V to +13.5 V -13.5 86 115 +13.0 108 196 1.0 1.7 +14.2 -14.9 +14.1 -14.8 +13.9 -14.3 70 5 12 6 25 0.1 Conditions Min Typ 0.08 Max 0.4 0.8 1.0 1.8 80 0.7 10 75 0.3 0.5 Unit mV mV mV mV pA nA nA pA nA nA pF pF V dB V/mV V/C V/C V V V V V V V V mA dB mA mA mA V/s MHz s s % Degrees
-14.6 -14.5
-13.8 -12.1
20 8 0.5 0.9 0.0005 52
Rev. H | Page 4 of 20
AD8510/AD8512/AD8513
Parameter NOISE PERFORMANCE Voltage Noise Density Symbol en Conditions f = 10 Hz f = 100 Hz f = 1 kHz f = 10 kHz 0.1 Hz to 10 Hz bandwidth Min Typ 34 12 8.0 7.6 2.4 Max Unit nV/Hz nV/Hz nV/Hz nV/Hz V p-p
10 5.2
Peak-to-Peak Voltage Noise
1
en p-p
AD8510/AD8512 only.
Rev. H | Page 5 of 20
AD8510/AD8512/AD8513 ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Supply Voltage Input Voltage Output Short-Circuit Duration to GND Storage Temperature Range Operating Temperature Range Junction Temperature Range Lead Temperature (Soldering, 10 sec) Electrostatic Discharge (Human Body Model) Rating 18 V VS Observe derating curves -65C to +150C -40C to +125C -65C to +150C 300C 2000 V
Table 4. Thermal Resistance
Package Type 8-Lead MSOP (RM) 8-Lead SOIC_N (R) 14-Lead SOIC_N (R) 14-Lead TSSOP (RU)
1
JA1 210 158 120 180
JC 45 43 36 35
Unit C/W C/W C/W C/W
JA is specified for worst-case conditions, that is, JA is specified for device soldered in circuit board for surface-mount packages.
ESD CAUTION
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Rev. H | Page 6 of 20
AD8510/AD8512/AD8513 TYPICAL PERFORMANCE CHARACTERISTICS
120 VSY = 15V TA = 25C
100k VSY = 5V, 15V
100
NUMBER OF AMPLIFIERS
80
INPUT BIAS CURRENT (pA)
02729-007
10k
1k
60
40
100
20
10
02729-010
0
-0.5 -0.4 -0.3 -0.2 -0.1
0
0.1
0.2
0.3
0.4
0.5
INPUT OFFSET VOLTAGE (mV)
1 -40
-25 -10
5
20 35 50 65 TEMPERATURE (C)
80
95
110 125
Figure 7. Input Offset Voltage Distribution
Figure 10. Input Bias Current vs. Temperature
30 VSY = 15V B GRADE 25
INPUT OFFSET CURRENT (pA)
1000
NUMBER OF AMPLIFIERS
100 15V 10 5V
20
15
10
1
02729-011
5
02729-008
0 0 1 2 3 TCVOS (V/C) 4 5 6
0.1 -40
-25 -10
5
20 35 50 65 TEMPERATURE (C)
80
95
110 125
Figure 8. AD8510/AD8512 TCVOS Distribution
Figure 11. Input Offset Current vs. Temperature
30 VSY = 15V A GRADE 25
NUMBER OF AMPLIFIERS
40 TA = 25C 35 30 25 20 15 10
02729-012
20
15
10
5
02729-009
INPUT BIAS CURRENT (pA)
5 0
0 0 1 2 3 TCVOS (V/C) 4 5 6
8
13
18 23 SUPPLY VOLTAGE (V+ - V- )
28
30
Figure 9. AD8510/AD8512 TCVOS Distribution
Figure 12. Input Bias Current vs. Supply Voltage
Rev. H | Page 7 of 20
AD8510/AD8512/AD8513
2.0
SUPPLY CURRENT PER AMPLIFIER (mA)
1.9 1.8 1.7 1.6 1.5 1.4 1.3 1.2
TA = 25C
2.8 2.6 2.4
SUPPLY CURRENT (mA)
TA = 25C
2.2 2.0 1.8 1.6 1.4
02729-013
1.1 1.0 8 13 18 23 SUPPLY VOLTAGE (V+ - V-) 28
1.2 1.0 8 13 18 23 SUPPLY VOLTAGE (V+ - V-) 28
30
33
Figure 13. AD8512 Supply Current per Amplifier vs. Supply Voltage
Figure 16. AD8510 Supply Current vs. Supply Voltage
16 VOL 14 VOH
OUTPUT VOLTAGE (V)
70
VSY = 15V
315 VSY = 15V RL = 2.5k CSCOPE = 20pF M = 52 270 225 180 135 90 45 0
PHASE (Degrees)
02729-018
02729-017
60 50 40
12 10 8 6 4 VOH
02729-014
GAIN (dB)
30 20 10 0
VOL
VSY = 5V
-10 -20 -30 10k 100k 1M FREQUENCY (Hz) 10M
-45 -90 -135 50M
2 0
0
10
20
30 40 50 LOAD CURRENT (mA)
60
70
80
Figure 14. AD8510/AD8512 Output Voltage vs. Load Current
Figure 17. Open-Loop Gain and Phase vs. Frequency
2.50
SUPPLY CURRENT PER AMPLIFIER (mA)
2.50
2.25
SUPPLY CURRENT (mA)
2.25
15V
2.00
15V
2.00 5V 1.75
1.75 5V 1.50
1.50
1.25
02729-015
1.25
1.00 -40 -25
-10
5
35 50 20 65 TEMPERATURE (C)
80
95
110 125
1.00 -40 -25
-10
5
35 50 20 65 TEMPERATURE (C)
80
95
110 125
Figure 15. AD8512 Supply Current per Amplifier vs. Temperature
Figure 18. AD8510 Supply Current vs. Temperature
Rev. H | Page 8 of 20
02729-016
AD8510/AD8512/AD8513
70 60 50
CLOSED-LOOP GAIN (dB)
OUTPUT IMPEDANCE ()
300 VSY = 15V, 5V 270 240 210 180 150 120 90 60
02729-019
VSY = 15V VIN = 50mV
40 30 20 10 0 -10 -20 -30 1k
AV = 100
AV = 10
AV = 1
AV = 100 AV = 10
02729-022
AV = 1
30 0 100 1k 10k 1M 100k FREQUENCY (Hz) 10M 100M
10k
100k 1M FREQUENCY (Hz)
10M
50M
Figure 19. Closed-Loop Gain vs. Frequency
Figure 22. Output Impedance vs. Frequency
120 VSY = 15V 100
1k VSY = 5V TO 15V
VOLTAGE NOISE DENSITY (nV/ Hz)
02729-020
80
CMRR (dB)
100
60
40
10
20
0 100
1k
10k
100k 1M FREQUENCY (Hz)
10M
100M
1
1
10
100 FREQUENCY (Hz)
1k
10k
Figure 20. CMRR vs. Frequency
Figure 23. Voltage Noise Density vs. Frequency
120 VSY = 5V, 15V 100 80 -PSRR
VSY = 15V
60 40 +PSRR 20 0 -20 100
VOLTAGE (1V/DIV)
PSRR (dB)
1k
10k
100k 1M FREQUENCY (Hz)
10M
100M
02729-021
TIME (1s/DIV)
Figure 21. PSRR vs. Frequency
Figure 24. 0.1 Hz to 10 Hz Input Voltage Noise
Rev. H | Page 9 of 20
02729-024
02729-023
AD8510/AD8512/AD8513
280 VSY = 5V TO 15V 245
VOLTAGE NOISE DENSITY (nV Hz)
SMALL-SIGNAL OVERSHOOT (%)
90 80 70 60 50 40 30 20 10 0 10
02729-028
VSY = 15V RL = 2k
210 175 140 105 70
02729-025
+OS -OS
35 0
0
10
20
30
40
50
60
70
80
90
100
1
FREQUENCY (Hz)
100 1k LOAD CAPACITANCE (pF)
10k
Figure 25. Voltage Noise Density vs. Frequency
Figure 28. Small-Signal Overshoot vs. Load Capacitance
70
315 VSY = 5V RL = 2.5k CSCOPE = 20pF M = 44.5 270 225
VSY = 15V RL = 2k CL = 100pF AV = 1
60 50
OPEN-LOOP GAIN (dB)
VOLTAGE (5V/DIV)
40 30 20 10 0 -10
135 90 45 0
-45 -90 100k 1M FREQUENCY (Hz) 10M -135 50M
02729-029
02729-026
-20 -30 10k
TIME (1s/DIV)
Figure 26. Large-Signal Transient Response
Figure 29. Open-Loop Gain and Phase vs. Frequency
120
VSY = 15V RL = 2k CL = 100pF AV = 1
VSY = 5V 100
VOLTAGE (50mV/DIV)
80
CMRR (dB)
60
40
20
02729-027
02729-030
0 100
1k
10k
TIME (100ns/DIV)
100k 1M FREQUENCY (Hz)
10M
100M
Figure 27. Small-Signal Transient Response
Figure 30. CMRR vs. Frequency
Rev. H | Page 10 of 20
PHASE (Degrees)
180
AD8510/AD8512/AD8513
300 270 240
OUTPUT IMPEDANCE ()
VSY = 5V VIN = 50mV
210 180 150 120 90 60 30 0 100 1k 10k 100k 1M FREQUENCY (Hz) 10M 100M AV = 100 AV = 1
VOLTAGE (50mV/DIV)
02729-031
VSY = 5V RL = 2k CL = 100pF AV = 1
AV = 10
TIME (100ns/DIV)
Figure 31. Output Impedance vs. Frequency
Figure 34. Small-Signal Transient Response
100
VSY = 5V
90
SMALL-SIGNAL OVERSHOOT (%)
VSY = 5V RL = 2k
80 70 60 50 40 30 20 10 0 1 10 100 1k LOAD CAPACITANCE (pF)
02729-035
VOLTAGE (1V/DIV)
+OS -OS
02729-032
TIME (1s/DIV)
10k
Figure 32. 0.1 Hz to 10 Hz Input Voltage Noise
Figure 35. Small-Signal Overshoot vs. Load Capacitance
100
NUMBER OF AMPLIFIERS
VSY = 5V RL = 2k CL = 100pF AV = 1
90 80 70 60 50 40 30 20 10
02729-033
VS = 15V
VOLTAGE (2V/DIV)
02729-034
0
0
1
2
3 TCVOS (V/C)
4
5
6
TIME (1s/DIV)
Figure 33. Large-Signal Transient Response
Figure 36. AD8513 TCVOS Distribution
Rev. H | Page 11 of 20
02729-036
AD8510/AD8512/AD8513
120 VS = 5V 100
NUMBER OF AMPLIFIERS OUTPUT VOLTAGE (V)
16 14 12 10 8 6 VOL 4 VOH
02729-039
VOL VOH
VSY = 15V
80
60
40
VSY = 5V
20
02729-037
2 0
0
0
1
2
3 TCVOS (V/C)
4
5
6
0
10
20
30
40
50
60
70
80
LOAD CURRENT (mA)
Figure 37. AD8513 TCVOS Distribution
Figure 39. AD8513 Output Voltage vs. Load Current
2.5
SUPPLY CURRENT PER AMPLIFIER (mA)
3.0
2.4 2.3 2.2 2.1 2.0 1.9 1.8 1.7 1.6 1.5 8
SUPPLY CURRENT PER AMPLIFIER (mA)
TA = 25C
2.5
15V
2.0 5V 1.5
1.0
0.5
02729-040
02729-038
13
18
23
28
33
0 -40
-25
-10
5
20
35
50
65
80
95
110
125
SUPPLY VOLTAGE (V+ - V-)
TEMPERATURE (C)
Figure 38. AD8513 Supply Current per Amplifier vs. Supply Voltage
Figure 40. AD8513 Supply Current per Amplifier vs. Temperature
Rev. H | Page 12 of 20
AD8510/AD8512/AD8513 GENERAL APPLICATION INFORMATION
INPUT OVERVOLTAGE PROTECTION
The AD8510/AD8512/AD8513 have internal protective circuitry that allows voltages as high as 0.7 V beyond the supplies to be applied at the input of either terminal without causing damage. For higher input voltages, a series resistor is necessary to limit the input current. The resistor value can be determined from the formula
0.01 VSY = 5V RL = 100k BW = 22kHz
DISTORTION (%)
0.001
VIN - VS RS
5 mA
02729-056
With a very low offset current of <0.5 nA up to 125C, higher resistor values can be used in series with the inputs. A 5 k resistor protects the inputs from voltages as high as 25 V beyond the supplies and adds less than 10 V to the offset.
0.0001 20
100
1k FREQUENCY (Hz)
10k
20k
Figure 42. THD + N vs. Frequency
OUTPUT PHASE REVERSAL
Phase reversal is a change of polarity in the transfer function of the amplifier. This can occur when the voltage applied at the input of an amplifier exceeds the maximum common-mode voltage. Phase reversal can cause permanent damage to the device and can result in system lockups. The AD8510/AD8512/AD8513 do not exhibit phase reversal when input voltages are beyond the supplies.
VSY = 5V AV = 1 RL = 10k VOUT
TOTAL NOISE INCLUDING SOURCE RESISTORS
The low input current noise and input bias current of the AD8510/AD8512/AD8513 make them the ideal amplifiers for circuits with substantial input source resistance. Input offset voltage increases by less than 15 nV per 500 of source resistance at room temperature. The total noise density of the circuit is
e nTOTAL = e n 2 + (i n R S )2 + 4kTR S
VOLTAGE (2V/DIV)
where: en is the input voltage noise density of the parts. in is the input current noise density of the parts. RS is the source resistance at the noninverting terminal. k is Boltzmann's constant (1.38 x 10-23 J/K). T is the ambient temperature in Kelvin (T = 273 + C). For RS < 3.9 k, en dominates and enTOTAL en. The current noise of the AD8510/AD8512/AD8513 is so low that its total density does not become a significant term unless RS is greater than 165 M, an impractical value for most applications.
02729-057
VIN
The total equivalent rms noise over a specific bandwidth is expressed as
TIME (20s/DIV)
Figure 41. No Phase Reversal
enTOTAL = enTOTAL BW
where BW is the bandwidth in hertz. Note that the previous analysis is valid for frequencies larger than 150 Hz and assumes flat noise above 10 kHz. For lower frequencies, flicker noise (1/f) must be considered.
TOTAL HARMONIC DISTORTION (THD) + NOISE
The AD8510/AD8512/AD8513 have low THD and excellent gain linearity, making these amplifiers great choices for precision circuits with high closed-loop gain and for audio application circuits. Figure 42 shows that the AD8510/AD8512/AD8513 have approximately 0.0005% of total distortion when configured in positive unity gain (the worst case) and driving a 100 k load.
Rev. H | Page 13 of 20
AD8510/AD8512/AD8513
SETTLING TIME
Settling time is the time it takes the output of the amplifier to reach and remain within a percentage of its final value after a pulse is applied at the input. The AD8510/AD8512/AD8513 settle to within 0.01% in less than 900 ns with a step of 0 V to 10 V in unity gain. This makes each of these parts an excellent choice as a buffer at the output of DACs whose settling time is typically less than 1 s. In addition to the fast settling time and fast slew rate, low offset voltage drift and input offset current maintain the full accuracy of 12-bit converters over the entire operating temperature range.
OUTPUT
+15V VSY = 15V AV = -100 RL = 10k
VOLTAGE
0V
INPUT
0V -200mV
02729-054
OVERLOAD RECOVERY TIME
Overload recovery, also known as overdrive recovery, is the time it takes the output of an amplifier to recover to its linear region from a saturated condition. This recovery time is particularly important in applications where the amplifier must amplify small signals in the presence of large transient voltages. Figure 43 shows the positive overload recovery of the AD8510/ AD8512/AD8513. The output recovers in approximately 200 ns from a saturated condition.
VSY = 15V VIN = 200mV AV = -100 RL = 10k
TIME (2s/DIV)
Figure 44. Negative Overload Recovery
CAPACITIVE LOAD DRIVE
The AD8510/AD8512/AD8513 are unconditionally stable at all gains in inverting and noninverting configurations. Each device is capable of driving a capacitive load of up to 1000 pF without oscillation in unity gain using the worst-case configuration. However, as with most amplifiers, driving larger capacitive loads in a unity gain configuration may cause excessive overshoot and ringing, or even oscillation. A simple snubber network significantly reduces the amount of overshoot and ringing. The advantage of this configuration is that the output swing of the amplifier is not reduced, because RS is outside the feedback loop.
V+
OUTPUT VOLTAGE INPUT
0V
-15V
200mV 0V
02729-053
2
7
AD8510
200mV
3 4
6
VOUT RS CS CL
02729-055
TIME (2s/DIV)
Figure 43. Positive Overload Recovery
V-
The negative overdrive recovery time shown in Figure 44 is less than 200 ns. In addition to the fast recovery time, the AD8510/AD8512/ AD8513 show excellent symmetry of the positive and negative recovery times. This is an important feature for transient signal rectification because the output signal is kept equally undistorted throughout any given period.
Figure 45. Snubber Network Configuration
Rev. H | Page 14 of 20
AD8510/AD8512/AD8513
Figure 46 shows a scope plot of the output of the AD8510/AD8512/ AD8513 in response to a 400 mV pulse. The circuit is configured in positive unity gain (worst case) with a load experience of 500 pF.
VSY = 15V CL = 500pF RL =10k
OPEN-LOOP GAIN AND PHASE RESPONSE
In addition to their impressive low noise, low offset voltage, and offset current, the AD8510/AD8512/AD8513 have excellent loop gain and phase response even when driving large resistive and capacitive loads. Compared with Competitor A (see Figure 49) under the same conditions, with a 2.5 k load at the output, the AD8510/AD8512/ AD8513 have more than 8 MHz of bandwidth and a phase margin of more than 52. Competitor A, on the other hand, has only 4.5 MHz of bandwidth and 28 of phase margin under the same test conditions. Even with a 1 nF capacitive load in parallel with the 2 k load at the output, the AD8510/AD8512/AD8513 show much better response than Competitor A, whose phase margin is degraded to less than 0, indicating oscillation.
70 60 50 40 VSY = 15V RL = 2.5k CL = 0pF 315 270 225 180 135 90 45 0
VOLTAGE (200mV/DIV)
TIME (1s/DIV)
Figure 46. Capacitive Load Drive Without Snubber
VOLTAGE (200mV/DIV)
VSY = 15V RL = 10k CL = 500pF RS = 100 CS = 1nF
GAIN (dB)
30 20 10 0
-10 -20 -30 10k 100k 1M FREQUENCY (Hz) 10M
-45
02729-043
02729-044
-90 -135 50M
Figure 48. Frequency Response of the AD8510/AD8512/AD8513
02729-042
70 60 50 40
GAIN (dB)
315 VSY = 15V RL = 2.5k CL = 0pF 270 225 180 135 90 45 0
PHASE (Degrees)
TIME (1s/DIV)
Figure 47. Capacitive Load with Snubber Network
Optimum values for RS and CS depend on the load capacitance and input stray capacitance and are determined empirically. Table 5 shows a few values that can be used as starting points.
Table 5. Optimum Values for Capacitive Loads
CLOAD 500 pF 2 nF 5 nF RS () 100 70 60 CS 1 nF 100 pF 300 pF
30 20 10 0
-10 -20 -30 10k 100k 1M FREQUENCY (Hz) 10M
-45 -90 -135 50M
Figure 49. Frequency Response of Competitor A
Rev. H | Page 15 of 20
PHASE (Degrees)
When the snubber circuit is used, the overshoot is reduced from 55% to less than 3% with the same load capacitance. Ringing is virtually eliminated, as shown in Figure 47.
02729-041
AD8510/AD8512/AD8513
PRECISION RECTIFIERS
Rectifying circuits are used in a multitude of applications. One of the most popular uses is in the design of regulated power supplies, where a rectifier circuit is used to convert an input sinusoid to a unipolar output voltage. However, there are some potential problems with amplifiers used in this manner. When the input voltage (VIN) is negative, the output is zero, and the magnitude of VIN is doubled at the inputs of the op amp. If this voltage exceeds the power supply voltage, it may permanently damage some amplifiers. In addition, the op amp must come out of saturation when VIN is negative. This delays the output signal because the amplifier requires time to enter its linear region. Although the AD8510/AD8512/AD8513 have a very fast overdrive recovery time, which makes them great choices for the rectification of transient signals, the symmetry of the positive and negative recovery times is also important to keep the output signal undistorted. Figure 50 shows the test circuit of the rectifier. The first stage of the circuit is a half-wave rectifier. When the sine wave applied at the input is positive, the output follows the input response. During the negative cycle of the input, the output tries to swing negative to follow the input, but the power supply restrains it to zero. In a similar fashion, the second stage is a follower during the positive cycle of the sine wave and an inverter during the negative cycle.
R2 10k R3 10k
VOLTAGE (1V/DIV)
TIME (1ms/DIV)
Figure 51. Half-Wave Rectifier Signal (OUT A in Figure 50)
VOLTAGE (1V/DIV)
TIME (1ms/DIV)
Figure 52. Full-Wave Rectifier Signal (OUT B in Figure 50)
10V VIN 3V p-p
3 6 4 7
2/2
R1 1k
2
1/2
8 1 5
AD8512
8
AD8512
4
OUT B (FULL WAVE)
10V OUT A (HALF WAVE)
02729-045
Figure 50. Half-Wave and Full-Wave Rectifiers
Rev. H | Page 16 of 20
02729-047
02729-046
AD8510/AD8512/AD8513
I-V CONVERSION APPLICATIONS
Photodiode Circuits
Common applications for I-V conversion include photodiode circuits where the amplifier is used to convert a current emitted by a diode placed at the positive input terminal into an output voltage. The AD8510/AD8512/AD8513's low input bias current, wide bandwidth, and low noise make them each an excellent choice for various photodiode applications, including fax machines, fiber optic controls, motion sensors, and bar code readers. The circuit shown in Figure 53 uses a silicon diode with zero bias voltage. This is known as a photovoltaic mode; this configuration limits the overall noise and is suitable for instrumentation applications.
Cf R2
A typical value for Rd is 1000 M. Because Rd >> R2, the circuit behavior is not impacted by the effect of the junction resistance. The maximum signal bandwidth is
f MAX = ft 2R2Ct
where ft is the unity gain frequency of the amplifier. Cf can be calculated by
Cf = Ct 2R2 ft
where ft is the unity gain frequency of the op amp, and it achieves a phase margin, M, of approximately 45. A higher phase margin can be obtained by increasing the value of Cf. Setting Cf to twice the previous value yields approximately M = 65 and a maximal flat frequency response, but it reduces the maximum signal bandwidth by 50%. Using the previous parameters with a Cf 1 pF, the signal bandwidth is approximately 2.6 MHz.
VEE
Signal Transmission Applications
2 4
AD8510
Rd Ct
3 7
6
VCC
02729-048
One popular signal transmission method uses pulse-width modulation. High data rates may require a fast comparator rather than an op amp. However, the need for sharp, undistorted signals may favor using a linear amplifier. The AD8510/AD8512/AD8513 make excellent voltage comparators. In addition to a high slew rate, the AD8510/ AD8512/AD8513 have a very fast saturation recovery time. In the absence of feedback, the amplifiers are in open-loop mode (very high gain). In this mode of operation, they spend much of their time in saturation. The circuit shown in Figure 54 was used to compare two signals of different frequencies, namely a 100 Hz sine wave and a 1 kHz triangular wave. Figure 55 shows a scope plot of the resulting output waveforms. A pull-up resistor (typically 5 k) can be connected from the output to VCC if the output voltage needs to reach the positive rail. The trade-off is that power consumption is higher.
+15V
Figure 53. Equivalent Preamplifier Photodiode Circuit
A larger signal bandwidth can be attained at the expense of additional output noise. The total input capacitance (Ct) consists of the sum of the diode capacitance (typically 3 pF to 4 pF) and the amplifier's input capacitance (12 pF), which includes external parasitic capacitance. Ct creates a pole in the frequency response that can lead to an unstable system. To ensure stability and optimize the bandwidth of the signal, a capacitor is placed in the feedback loop of the circuit shown in Figure 53. It creates a zero and yields a bandwidth whose corner frequency is 1/(2(R2Cf)). The value of R2 can be determined by the ratio
V/ID
where: V is the desired output voltage of the op amp. ID is the diode current. For example, if ID is 100 A and a 10 V output voltage is desired, R2 should be 100 k. Rd (see Figure 53) is a junction resistance that drops typically by a factor of 2 for every 10C increase in temperature.
V1
3
7
6
VOUT
2
4
V2
Figure 54. Pulse-Width Modulator
Rev. H | Page 17 of 20
02729-049
-15V
AD8510/AD8512/AD8513
The AD8510 single has two additional active terminals that are not present on the AD8512 dual or AD8513 quad parts. These pins are labeled "null" and are used for fine adjustment of the input offset voltage. Although the guaranteed maximum offset voltage at room temperature is 400 V and over the -40C to +125C range is 800 mV maximum, this offset voltage can be reduced by adding a potentiometer to the null pins as shown in Figure 58. With the 20 k potentiometer shown, the adjustment range is approximately 3.5 mV. The potentiometer parallels low value resistors in the drain circuit of the JFET differential input pair and allows unbalancing of the drain currents to change the offset voltage. If offset adjustment is not required, these pins should be left unconnected. Caution should be used when adding adjusting potentiometers to any op amp with this capability for several reasons. First, there is gain from these nodes to the output; therefore, capacitive coupling from noisy traces to these nodes will inject noise into the signal path. Second, the temperature coefficient of the potentiometer will not match the temperature coefficient of the internal resistors, so the offset voltage drift with temperature will be slightly affected. Third, this provision is for adjusting the offset voltage of the op amp, not for adjusting the offset of the overall system. Although it is tempting to decrease the value of the potentiometer to attain more range, this will adversely affect the dc and ac parameters. Instead, increase the potentiometer to 50 k to decrease the range if needed.
20k
6 5 5k 5k 4
02729-052
VOLTAGE (5V/DIV)
TIME (2ms/DIV)
Figure 55. Pulse-Width Modulation
Crosstalk
Crosstalk, also known as channel separation, is a measure of signal feedthrough from one channel to another on the same IC. The AD8512/AD8513 have a channel separation of better than -90 dB for frequencies up to 10 kHz and of better than -50 dB for frequencies up to 10 MHz. Figure 57 shows the typical channel separation behavior between Amplifier A (driving amplifier) and each of the following: Amplifier B, Amplifier C, and Amplifier D.
VOUT 20k +VS 2 18V p-p 3 VIN -VS 8 1 7 2.2k
02729-050
V+
1
- INPUT +
2
5
AD8510
3 4
7 6
OUTPUT
VOUT CROSSTALK = 20 log 10V IN
Figure 56. Crosstalk Test Circuit
0 -20
CHANNEL SEPARATION (dB)
V-
Figure 58. Optional Offset Nulling Circuit
-40 -60 -80 -100 -120
02729-051
CH B CH D CH C
-140 -160 100
1k
100k 10k FREQUENCY (Hz)
1M
10M
Figure 57. Channel Separation
Rev. H | Page 18 of 20
02729-058
VOS TRIM RANGE IS TYPICALLY 3.5mV
AD8510/AD8512/AD8513 OUTLINE DIMENSIONS
5.00 (0.1968) 4.80 (0.1890)
5.10 5.00 4.90
4.00 (0.1574) 3.80 (0.1497)
8 1
5 4
6.20 (0.2441) 5.80 (0.2284)
14
8
1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040) COPLANARITY 0.10 SEATING PLANE
1.75 (0.0688) 1.35 (0.0532)
0.50 (0.0196) 0.25 (0.0099) 8 0 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157)
4.50 4.40 4.30
45
1 7
6.40 BSC
PIN 1 1.05 1.00 0.80 0.65 BSC 1.20 MAX 0.15 0.05
012407-A
0.51 (0.0201) 0.31 (0.0122)
0.20 0.09
COMPLIANT TO JEDEC STANDARDS MS-012-A A CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
0.30 0.19
SEATING COPLANARITY PLANE 0.10
8 0
0.75 0.60 0.45
COMPLIANT TO JEDEC STANDARDS MO-153-AB-1
Figure 59. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches)
Figure 61. 14-Lead Thin Shrink Small Outline Package [TSSOP] (RU-14) Dimensions shown in millimeters
3.20 3.00 2.80
8.75 (0.3445) 8.55 (0.3366)
14 1 8 7
3.20 3.00 2.80 PIN 1
8
5
1
5.15 4.90 4.65
4
4.00 (0.1575) 3.80 (0.1496)
6.20 (0.2441) 5.80 (0.2283)
0.65 BSC 0.95 0.85 0.75 0.15 0.00 0.38 0.22 SEATING PLANE 1.10 MAX 8 0 0.80 0.60 0.40
0.25 (0.0098) 0.10 (0.0039) COPLANARITY 0.10
1.27 (0.0500) BSC
1.75 (0.0689) 1.35 (0.0531) SEATING PLANE
0.50 (0.0197) 0.25 (0.0098) 8 0 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157)
45
0.23 0.08
0.51 (0.0201) 0.31 (0.0122)
COPLANARITY 0.10
COMPLIANT TO JEDEC STANDARDS MO-187-AA
COMPLIANT TO JEDEC STANDARDS MS-012-AB CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 60. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters
Figure 62. 14-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-14) Dimensions shown in millimeters and (inches)
Rev. H | Page 19 of 20
060606-A
AD8510/AD8512/AD8513
ORDERING GUIDE
Model AD8510ARM-REEL AD8510ARM-R2 AD8510ARMZ-REEL 1 AD8510ARMZ-R21 AD8510AR AD8510AR-REEL AD8510AR-REEL7 AD8510ARZ1 AD8510ARZ-REEL1 AD8510ARZ-REEL71 AD8510BR AD8510BR-REEL AD8510BR-REEL7 AD8510BRZ1 AD8510BRZ-REEL1 AD8510BRZ-REEL71 AD8512ARM-REEL AD8512ARM-R2 AD8512ARMZ-REEL1 AD8512ARMZ-R21 AD8512AR AD8512AR-REEL AD8512AR-REEL7 AD8512ARZ1 AD8512ARZ-REEL1 AD8512ARZ-REEL71 AD8512BR AD8512BR-REEL AD8512BR-REEL7 AD8512BRZ1 AD8512BRZ-REEL1 AD8512BRZ-REEL71 AD8513AR AD8513AR-REEL AD8513AR-REEL7 AD8513ARZ1 AD8513ARZ-REEL1 AD8513ARZ-REEL71 AD8513ARU AD8513ARU-REEL AD8513ARUZ1 AD8513ARUZ-REEL1
1
Temperature Range -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C
Package Description 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead MSOP 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 14-Lead SOIC_N 14-Lead SOIC_N 14-Lead SOIC_N 14-Lead SOIC_N 14-Lead SOIC_N 14-Lead SOIC_N 14-Lead TSSOP 14-Lead TSSOP 14-Lead TSSOP 14-Lead TSSOP
Package Option RM-8 RM-8 RM-8 RM-8 R-8 R-8 R-8 R-8 R-8 R-8 R-8 R-8 R-8 R-8 R-8 R-8 RM-8 RM-8 RM-8 RM-8 R-8 R-8 R-8 R-8 R-8 R-8 R-8 R-8 R-8 R-8 R-8 R-8 R-14 R-14 R-14 R-14 R-14 R-14 RU-14 RU-14 RU-14 RU-14
Branding B7A B7A B7A# B7A#
B8A B8A B8A# B8A#
Z = RoHS Compliant Part, # denotes RoHS compliant product may be top or bottom marked.
(c)2002-2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D02729-0-10/07(H)
Rev. H | Page 20 of 20

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